Generally, electrostatic discharge (ESD) is one of the major reasons for destruction of semiconductor integrated circuits. ESD is considered as a major reliability threat in the semiconductor industry. Silicon Controlled Rectifiers (SCR) are commonly used as protection device in integrated circuits. SCR's are very efficient energy absorbers; however, they are prone to latch up. Typically, SCRs are integrated with the NPN and PNP structure of an integrated circuit sharing wells to decrease the holding voltage and increase the robustness of the SCR. Integrated SCRs are typically custom built for a given voltage rating.
The NPN and PNP structures, which constitute the integrated SCRs, have different electrical characteristics as a function of current. For example, the PNP typically has a lower gain than NPN at low and medium current densities and its current gain begin to decrease at a lower current density. In an integrated SCR construction, it is not possible to independently optimize gain with NPN or the PNP structures. This leads to non-optimized designs. In many cases, PNP gain can be too low for building an acceptable SCR structure. An additional drawback of integrated SCR's is that they have a low and difficult to modulate holding voltage and are prone to latch-up. The holding voltage in integrated SCR's are difficult to modulate since the internal feedback terminals of the SCR are not accessible. Variable holding voltages in integrated SCR's are achieved by changing anode to cathode spacing or by reducing the positive feedback with parasitic paths, which reduces their robustness and speed.